Gray scale LCD control capacitors formed between a control capacitor electrode on one side of an insulating layer and two subpixel electrodes on the other side

ABSTRACT

In a gray-scale liquid crystal display panel of the type wherein first and second transparent substrates (1, 5) are disposed in parallel with liquid crystal (7) sealed in a space defined therebetween, the second substrate (5) is coated all over its inside surface with a transparent common electrode (6) and the first substrate (1) has on its inside surface pixels arranged in a matrix form and thin film transistors (8) each provided near one of the pixels, the pixels each include first and second spaced-apart subpixel electrodes (4 1 , 4 2 ) formed on one side of an insulating layer (15) provided on the inside surface of the first substrate and a control capacitor electrode (2) formed on the other side of the insulating layer and covering the gap (GP) and overlapping the first and second subpixel electrodes (4 1 , 4 2 ) over predetermined areas thereof. The first subpixel electrode (4 1 ), the control capacitor electrode (2) and the second subpixel electrode (4 2 ) constitute first, second and third liquid crystal capacitors (C LC1 , C LC2 , C LC3 ) between them and the common electrode (6) facing them. The first subpixel electrode (4 1 ) and the control capacitor electrode (2) are coupled via a first control capacitor (C LC1 ), and the control capacitor electrode (2) and the second subpixel electrode (4 2 ) are coupled via a second control capacitor (C LC2 ). The drain electrode of the thin film transistor is connected directly to the first subpixel electrode.

This application is a continuation of Ser. No. 08/066,143, filed on Jun.1, 1993 now abandoned.

TECHNICAL FIELD

The present invention relates to a gray scale liquid crystal displaypanel which has each pixel of the display composed of a plurality ofsubpixels and which is capable of providing a gray scale display.

BACKGROUND ART

In a liquid crystal display panel disclosed in U.S. Pat. No. 4,840,460each pixel electrode, which faces a common electrode across a liquidcrystal interposed therebetween, is divided into a plurality of subpixelelectrodes of the same area, and control capacitor electrodes areprovided each of which has a different area and faces one of the dividedsubpixel electrodes across an insulating layer sandwiched therebetween.The control capacitor electrodes in each pixel are interconnectedelectrically. Each control capacitor electrode and the subpixelelectrode disposed opposite it across the insulating layer constitute acontrol capacitor, and the subpixel electrode and the common electrodefacing it across the liquid crystal constitute a liquid crystalcapacitor. These two capacitors are connected in series to each other. Adrive voltage which is applied to a control electrode is divided by thetwo capacitors. The liquid crystal capacitors have the same capacity butall the control capacitors have different capacities. On this account,even if a voltage is applied to all the control capacitor electrodes incommon to them, the liquid crystal capacitors are each supplied with adifferent capacitance-divided voltage. The threshold voltage of theliquid crystal (i.e. a voltage which is applied to the liquid crystalwhen the transmission of light through the liquid crystal display panelbegins) is substantially constant all over the display panel. Hence, bycontrolling the voltage which is applied to the control capacitorelectrodes, it is possible to control the numbers of subpixel electrodesfrom which capacitance-divided voltages higher and lower than thethreshold voltage, respectively, are applied to the liquid crystal, andconsequently, the divided regions of the pixel can be driven stepwise.

In the case of applying the liquid crystal display panel to a picturedisplay including a gray level as in television, the drive voltage thatis applied to each pixel of the liquid crystal display may take variousvalues or magnitudes within a certain voltage range in accordance withthe picture signal level. In a liquid crystal display panel of the typewherein each pixel is not divided into subpixels, as the drive voltageincreases, a gray-level display is produced through utilization of asloping range of a light transmittance curve from the rise to saturationof the transmittance of each pixel region. In the slope region of thelight transmittance curve liquid crystal molecules are orientedobliquely to the substrate. Since the visual angle dependence of thelight transmittance is large in this case, a proper angle of field forsuch a liquid crystal display panel is generally very small.

In the conventional liquid crystal display panel wherein each pixel iscomposed of a plurality of subpixels and the subpixels are supplied withvoltages which differ in a sequential order as described in theaforementioned U.S. patent, however, the transmission of light throughone subpixel region reaches saturation through the above-mentionedsloping range of the transmittance curve after starting as the drivevoltage is increased, and then the transmission of light through anothersubpixel region similarly reaches saturation through the sloping range.In this way, the respective subpixel regions reach the saturation rangethrough the sloping range of the light transmittance curve one afteranother. Hence, in the state of providing a display at an arbitrary graylevel, the liquid crystal molecules are oriented obliquely to thesubstrate in one subpixel region at most but in the other subpixelregions the liquid crystal molecules are oriented vertically orhorizontally to the substrate. By decreasing the number of subpixelregions in which the liquid crystal molecules are oriented obliquely tothe substrate in the gray-level display as mentioned above, the area ofa large visual angle dependence in the pixel region is reduced, andconsequently, the average visual angle dependence of the entire pixelregion can be reduced.

With the pixel structure disclosed in the U.S. patent, however, thesubpixel electrodes are each separated by a gap or region to which novoltage can be applied, i.e. a region which does not contribute to thedisplay--this reduces the aperture ratio accordingly. With a view toovercoming this defect, the inventors of the subject applicationproposed, in their prior U.S. patent application Ser. No. 07/733,177filed Jul. 19, 1991, now U.S. Pat. No. 5,245,450 issued Sep. 14, 1993, apixel structure wherein subpixel electrodes and a control capacitorelectrode are formed so that they cover the gap between the subpixelsand overlap the subpixels over desired areas, one of the subpixelelectrodes and the control capacitor electrode are connected through acontact hole made in an insulating layer and the drive voltage isapplied directly to the said one subpixel electrode to applysubstantially equal voltage to the liquid crystal in the subpixel andthe gap region, thereby providing for increased aperture ratio of thepixel. The pixel electrode will be described with reference to FIGS. 1and 2.

FIG. 1 is a plan view showing one pixel region of a liquid crystaldisplay panel of the type having pixels arranged in a matrix form, andFIG. 2 is a sectional view taken on the line II--II in FIG. 1. Referencenumeral 1 indicates a transparent substrate as of transparent glass, onthe interior surface of which there is formed a control capacitorelectrode 2, which is, in turn, covered with an insulating layer 15deposited almost all over the interior surface of the substrate 1. Onthe top of the insulating layer 15 there is formed a subpixel electrode4₂ with one corner of the pixel region cut off in a square form, and inthe void area there is provided a rectangular subpixel electrode 4₁separated by a gap GP from the subpixel electrode 4₂. The insulatinglayer 15 has a contact hole 15H made therethrough substantially at thecenter of the subpixel electrode 4₁, the control capacitor electrode 2and the subpixel electrode 4₁ being interconnected through the contacthole 15H. Reference numeral 8 denotes a symbol indicating a thin filmtransistor provided near the subpixel electrode 4₁. In FIG. 2 itsconstruction is shown in section.

A gate insulating film 24 of the transistor 8 is deposited substantiallyall over the interior surface of the substrate 1, covering the pixelelectrodes 4₁ and 4₂ and a semiconductor layer 8SC of the transistor 8.The transistor 8 has its source electrode 8S and gate electrode 8Gconnected to a source line 21 and a gate line 25 shown symbolically inFIG. 1, respectively. Reference numeral 5 represents a transparentsubstrate as of transparent glass, which is coated all over its interiorsurface with a common electrode 6. Reference numeral 12 denotes astrip-like additional capacitor electrode, which is deposited opposite apart of the subpixel electrode 4₂ with the gate insulating film 24sandwiched between them. The additional capacitor electrodes 12 of allpixels are supplied with a common potential. Between the commonelectrode 6 and the gate insulating film 24 there is sealed liquidcrystal 7. Incidentally, the control capacitor electrode 2, the subpixelelectrodes 4₁, 4₂ and the common electrode 6 are transparent electrodesas of ITO. The subpixel electrode 4₁ has connected thereto a drainelectrode 8D of the thin film transistor 8 provided in its vicinity anda voltage Va corresponding to the picture signal level is applied to thesubpixel electrode 4₁ via the drain electrode 8D.

The pixel of such a construction as depicted in FIGS. 1 and 2 iscomposed of a subpixel formed by the subpixel electrode 4₁ and the gapregion GP of the control capacitor electrode 2 connected thereto, and asubpixel formed by the subpixel electrode 4₂. As shown in FIG. 2, liquidcrystal capacitors C_(LC1), C_(LC3) and C_(LC2) are formed between thecommon electrode 6 and the subpixel electrodes 4₁, 4₂ and the controlcapacitor 2, respectively, a control capacitor electrode C_(C) is formedbetween the control capacitor electrode 2 and the subpixel electrode 4₂,and an additional capacitor C_(S) is formed between the additionalcapacitor electrode 12 and the subpixel electrode 4₂. FIG. 3 shows anequivalent circuit of the pixel depicted in FIG. 1.

The drive voltage Va supplied via the drain electrode 8D of the thinfilm transistor 8 is applied intact to the subpixel electrode 4₁,whereas the subpixel electrode 4₂ is supplied with a voltage divided bythe sum of the capacitances of the liquid capacitor C_(LC3) and theadditional capacitor C_(S) and the capacitance of the control capacitorC_(C). This capacitance-divided voltage is controlled by suitablyselecting the capacitance value of the control capacitor C_(C), i.e. theoverlapping area of the subpixel electrode 4₂ and the control capacitorelectrode 2, and the area of the additional capacitor electrode 12. Theliquid crystal panel has a threshold voltage at which the transmissionof light begins (i.e. the panel is turned ON) and a voltage at which thetransmission of light is saturated. By gradually increasing the drivevoltage Va from a low starting voltage, the transmission of lightthrough the regions of the subpixel 4₁ and the gap GP begins (i.e. theseregions are turned ON) at a certain threshold voltage, and by furtherincreasing the voltage Va, the quantity of light that is transmittedthrough the regions gradually increases. By further increasing the drivevoltage Va, the region of the subpixel 4₂ is also turned ON and thetransmission therethrough of light is finally saturated, that is, allpixel regions enter the state in which the quantity of light passingtherethrough is maximum. By changing the voltage to be applied to eachsubpixel electrode through such control of drive voltage Va, agray-scale display can be produced.

The liquid crystal display panel of U.S. Pat. No. 5,245,450, shown inFIGS. 1 and 2, adopts the construction in which the drive voltage Va isapplied directly to the subpixel electrode 4₁ via the thin filmtransistor 8 and the subpixel electrode 4₁ is connected directly to thecontrol capacitor electrode 2 through the contact hole 15H made in theinsulating layer 15. In the case where two subpixel electrodes are usedas in the above-mentioned example, if the control capacitor electrode 2and the subpixel electrode 4₂ are shorted, the subpixel electrode 4₂ isalso supplied with the same drive voltage Va as that applied to thesubpixel electrode 4₁. Hence, even if a drive voltage is applied whichcauses, for example, the subpixel electrode 4₁ and the gap region GP toproduce a gray-level display, the display is provided at the same levelover the entire region of the pixel, including the subpixel electrode4₂. In this case, the quantity of light passing through the pixel islarger than in the case of no short occurring between theabove-mentioned electrodes, and the pixel is perceived as beingdefective rather than normal. In addition, since the liquid crystalmolecules are oriented obliquely over the entire region of the pixel,the visual angle dependence of the liquid crystal display panelincreases, and when the display panel is applied to a color display, thepixel becomes a defective pixel which clearly differs in color andsaturation than in the case where no short occurs.

The above description has been given of the light transmitting typeliquid crystal display panel but the same is true of a reflecting typeliquid crystal display panel wherein the subpixel electrodes 4₁, 4₂ andthe control capacitor electrode 12 are formed by metal layers.

It is therefore an object of the present invention to provide agray-scale liquid crystal display panel which has display pixels of alarge aperture ratio.

Another object of the present invention is to provide a gray-levelliquid crystal display panel which has display pixels such that thevisual angle dependence does not appreciably increase even if one of thesubpixel electrodes and the control capacitor electrode are shorted.

SUMMARY OF THE INVENTION

The gray-scale liquid crystal display panel according to the presentinvention has a construction wherein first and second transparentsubstrates are disposed opposite one another in parallel with liquidcrystal interposed therebetween, the first substrate has on the insidethereof pixels arranged in a matrix form, thin film transistors eachconnected to one of the pixels, source lines each connected to thesources of the thin film transistors of each column for supplying adrive voltage to the thin film transistors and gate lines each connectedto the gates of the thin film transistors of each row for supplying thethin film transistors with a gate signal for their ON-OFF control, andthe second substrate is coated over the entire area of its interiorsurface with a transparent common electrode facing all of the pixels.Each of the pixels includes a transparent insulating layer depositedover the first substrate, at least two subpixel electrodes formed aparton one side of the insulating layer, and at least one control capacitorelectrode formed on the other side of the insulating layer, coveringsubstantially the entire area of the gap between the two subpixelelectrodes and predetermined areas of the subpixel electrodes. Thecontrol capacitor electrode and the two subpixel electrodes constitutecontrol capacitors across the insulating layer. The source and drainelectrode of each thin film transistor, connected to one of the pixels,are connected directly to one of the two subpixel electrodes.

With such a pixel structure as mentioned above, the aforementionedcapacitance-divided voltage can be applied to the control capacitorelectrode and the gap region between the subpixel electrodes can also bemade to contribute to producing a display; hence, the aperture ratio ofeach pixel increases accordingly. Moreover, even if a short occursbetween either one of the two subpixel electrodes and the controlcapacitor electrode, the subpixel electrodes can be driven stepwisebecause they are capacitively connected to each other by the othercontrol capacitor, and the visual angle dependence does not appreciablyincrease.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view of a pixel region composed of a plurality ofsubpixels and capable of producing a gray-scale display;

FIG. 2 is a sectional view taken on the line II--II in FIG. 1;

FIG. 3 shows an equivalent circuit of the pixel depicted in FIG. 1;

FIG. 4 is a plan view illustrating the pixel structure of the liquidcrystal display panel according to the present invention;

FIG. 5 is a sectional view taken on the line V--V in FIG. 4;

FIG. 6 is a diagram showing an equivalent circuit of each pixel of theliquid crystal display panel according to the present invention;

FIG. 7 is a graph for explaining an example of the light transmittancecharacteristic of each liquid crystal capacitor with respect to thedrive voltage Va in the pixel depicted in FIGS. 4 and 5;

FIG. 8 is a sectional view, corresponding to FIG. 5, illustrating amodified form of the FIG. 5 embodiment;

FIG. 9 is a sectional view illustrating a modification of the FIG. 8structure which employs what is called a gate bottom type thin filmtransistor;

FIG. 10 is a plan view of one pixel in another embodiment of the presentinvention;

FIG. 11 is a sectional view taken on the line XI--XI in FIG. 10;

FIG. 12 is a diagram showing an equivalent circuit of the pixel depictedin FIG. 10.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring now to FIGS. 4 and 5, an embodiment of the present inventionwill be described. FIG. 4 is a plan view of one pixel region in a liquidcrystal display panel provided with display pixels arranged in a matrixform, and FIG. 5 a sectional view taken on the line V--V in FIG. 4.Reference numeral 1 indicates a transparent substrate as of transparentglass. On the interior surface of the transparent substrate 1 there isformed at one corner of a rectangular pixel a rectangular controlcapacitor electrode 2 smaller than the pixel, and the control capacitorelectrode 2 is covered with a first insulating layer 15 coated almostall over the interior surface of the substrate 1. On the top of theinsulating layer 15 there are deposited subpixel electrodes 4₁ and 4₂separated by a gap GP. The control capacitor electrode 2 coverssubstantially the entire area of the gap GP and predetermined areas ofthe subpixel electrodes 4₁ and 4₂, forming control capacitors C_(C1) andC_(C2) between the control capacitor electrode 2 and the subpixelelectrodes 4₁ and 4₂, respectively.

A source electrode 8S of each thin film transistor 8, a source line 21for interconnecting the source electrodes 8S of the thin filmtransistors 8 of each column, a drain electrode 8D of each thin filmtransistor 8 connected to the subpixel electrode 41, and a semiconductorlayer 8SC are formed on the same side of the first insulating layer 15as the side where the subpixel electrodes 4₁ and the 4₂ are provided. Asecond insulating layer 24 is deposited almost all over the interiorsurface of the substrate 1, covering them. The second insulating layer24 is used also as a gate insulating film common to all of the thin filmtransistors 8. On the gate insulating film 24 there are formed a gateelectrode 8G facing the semiconductor layer 8SC, a strip-like additionalcapacitor electrode 12 extending along the marginal portion of thesubpixel electrode 4₂, and a gate line 25 for interconnecting the gateelectrodes 8G of the thin film transistors 8 of each row. The additionalcapacitor electrode 12 constitutes an additional or supplementalcapacitor C_(S) between it and the subpixel electrode 4₂. A transparentsubstrate 5, facing the substrate 1 across liquid crystal 7 sealed inthe space defined therebetween, is coated over the entire area of itsinside surface with a transparent common electrode 6. Consequently,liquid crystal capacitors C_(LC1) and C_(LC2) are formed between thesubpixel electrodes 4₁ and 4₂ and the common electrode 6, respectively,and another liquid crystal capacitor C_(LC3) is formed between thecontrol capacitor electrode 2 and the common electrode 6 in the gapregion GP. The control capacitor electrode 2, the subpixel electrodes 4₁and 4₂, the common electrode 6 and the additional capacitor electrode 12are transparent electrodes made of ITO, for instance.

In this embodiment, such a contact hole 15H as referred to previouslywith respect to the pixel of FIG. 1 is not made in the first insulatinglayer, but instead the drain electrode 8D of the thin film transistor 8is connected directly to the subpixel electrode 4₁ and the controlcapacitor electrode 2 and the subpixel electrode 4₁ are capacitivelycoupled by the control capacitor C_(C1) formed between them. Hence, theequivalent circuit of the pixel shown in the embodiment of FIGS. 4 and 5is such as depicted in FIG. 6, wherein the liquid crystal capacitorsC_(LC1), C_(LC2) and C_(LC3) are connected to the drain D of the thinfilm transistor 8 directly, via the control capacitor C_(C1), and viathe control capacitors C_(C1) and C_(C2), respectively. Thus, the drivevoltage Va which is provided via the thin film transistor 8 is appliedintact across the liquid crystal capacitor C_(LC1). Setting C_(LC3)'=C_(LC3) +C_(S), the liquid crystal capacitor C_(LC2) is supplied witha voltage V₂ resulting from the capacitance division of the voltage Va,expressed by the following equation: ##EQU1## The liquid crystalcapacitor C_(LC3) is supplied with a voltage V₃ resulting from thecapacitance division of the thus divided voltage V₂, expressed by thefollowing equation: ##EQU2## Accordingly, the applied voltages decreaseone after another. That is, in this pixel the region of the gap GP ofthe control capacitor electrode 2 forming the liquid crystal capacitorC_(LC2) also functions as a subpixel--this structure is equivalent to astructure in which one pixel is divided into three subpixels.Incidentally, the respective additional capacitor electrodes 12 aresupplied with a common fixed potential via a line not shown, and theadditional capacitor C_(S) is connected in parallel to the liquidcrystal capacitor C_(LC3) equivalently. The additional or supplementalcapacitance C_(S) is provided to increase the amount of charges storedin each pixel to lengthen the time for which the pixel remains in thedisplay state.

The areas over which the control capacitor electrode 2 overlaps thesubpixel electrodes 4₁ and 4₂ (and consequently the capacitances of thecontrol capacitors C_(C1) and C_(C2)) are determined so that operationscurves, each showing the quantity of light transmitted through one ofthe liquid crystal capacitors C_(LC) (the saturated quantity oftransmitted light being indicated by 100%), bear such relationships asdepicted in FIG. 7. That is, the above-said overlapping areas areselected such that when a voltage V_(t2), indicated by the curve 27, isapplied at which the quantity of light transmitted through the liquidcrystal capacitor C_(LC1) is saturated, the quantity of transmittedlight through the liquid crystal capacitor C_(LC2) rises as indicated bythe curve 28, and when a voltage V_(t3), indicated by the curve 28, isapplied at which the quantity of transmitted light through the liquidcrystal capacitor C_(LC2) is saturated, the quantity of transmittedlight through the liquid crystal capacitor C_(LC3) rises as indicated bythe curve 29.

Let it be assumed, for example, in the FIG. 4 embodiment that a voltageVd, at which the quantity of transmitted light is intermediate betweenits rise and saturation, for example, 50%, is being applied as the drivevoltage Va to the subpixel electrode 4₁ from the thin film transistor 8.In this instance, the liquid crystal molecules are oriented obliquely tothe substrates in the region corresponding to the subpixel electrode 4₁,whereas in the regions corresponding to the gap GP and the subpixelelectrode 4₂ the liquid crystal molecules are oriented parallel to thesubstrates. As is evident from the equivalent circuit depicted in FIG.6, when the control capacitor, for example, C_(C1), is shorted, thevoltage Vd is applied to the liquid crystal capacitor C_(LC2) as well,and the voltage V₃ ', which is applied to the liquid crystal capacitorC_(LC3) iS expressed as follows, by substituting infinity for C_(C1) inEq. (2). ##EQU3## Since the voltage V₂ which is applied to the liquidcrystal capacitor C_(LC2) becomes equal to the voltage Va, the operationcurve 28 in FIG. 7 shifts to the position of the operation curve 27.Since the voltage V₃ ' which is applied to the liquid crystal capacitorC_(LC3) becomes higher than the voltage V₃ in the case of no short, asseen from Eq. (3), the operation curve 29 in FIG. 7 shifts to thevicinity of the curve 28. Thus, although the liquid crystal moleculesare oriented obliquely in the region corresponding to the gap GP aswell, the liquid crystal molecules are still oriented in parallel to thesubstrates in the region corresponding to the subpixel electrode 4₂,because the voltage V₃ ' which is provided to the subpixel electrode 4₂can be controlled to stay below the threshold voltage V_(t2). In thisway, the area over which the liquid crystal molecules are orientedobliquely to the substrates increases, and consequently, the quantity oftransmitted light over the entire pixel region increases accordingly,but it is possible to prevent the liquid crystal molecules from beingoriented obliquely over the entire region of the pixel. In other words,the reduction of the optimum visual angle and an increase in thequantity of transmitted light, which are caused by shorting of thecontrol capacitor, are less than in the case of FIG. 1.

When the control capacitor C_(C2) is shorted, the liquid crystalcapacitors C_(LC2) and C_(LC3) are connected in parallel as seen fromFIG. 6, and a voltage V₃ " which is provided to the liquid crystalcapacitor C_(LC3) is given as follows, by substituting infinity forC_(C2) in Eq. (2). ##EQU4## As is evident from Eq. (4), the voltage V₃ "becomes higher than the voltage V₃ in the case of no short-circuit, t,and in this case, the operation curve 29 in FIG. 7 shifts to thevicinity of the curve 28 (which also slightly shifts to right), butsince the voltage V₃ " which is provided to the subpixel electrode 4₂and the control capacitor electrode 2 still remains below the thresholdvoltage V_(t2), the display in these regions will not change.

When viewed from the outside of the optimum visual angle, the lightnessand contrast of a display on the liquid crystal display panel differfrom the lightness and contrast of the display viewed from the inside ofthe optimum visual angle. In a liquid crystal display panel adapted forcolor display (in which pixels are each provided with red, green andblue color filters), the above-said change in lightness and contrastappears as a change in the color and saturation of the display, inparticular, and hence is remarkably noticeable. Hence, in a liquidcrystal display panel of our prior U.S. Pat. No. 5,245,450 as shown inFIG. 1, a short of the control capacitor changes the color andsaturation of the display over the entire pixel region, and this isperceived as an apparent pixel defect. In contrast thereto, for example,in the FIG. 4 embodiment, even if one of the control capacitors isshorted, the subpixel electrodes 4₁ and 4₂ are capacitively coupled bythe other control capacitor. As the result of the short, the controlcapacitor electrode 2 and one of the subpixel electrodes 4₁ and 4₂ areconnected and the area of the subpixel electrode increases equivalently.In the gray-level display, however, the region over which the liquidcrystal molecules are oriented obliquely is either one of the subpixelelectrodes of the increased area and the other subpixel electrode, andthere is less possibility that the liquid crystal molecules are orientedobliquely over the entire pixel region. Thus, the visual angledependence of the display is small, and even if the panel is applied toa color display, changes in the color and saturation are small.Moreover, in the embodiment of FIGS. 4 and 5 the drain electrode 8D ofthe thin film transistor 8 and the subpixel electrode 4₁ are formed inthe same plane on the insulating layer 15 and are connected directly toeach other--this precludes the necessity of making such a contact holeas shown in FIG. 2 in the insulating layer 15, and hence reduces thenumber of steps involved in the manufacture of the liquid crystaldisplay panel accordingly.

While in the above embodiment the control capacitor electrode 2 isprovided on the side of the first insulating layer 15 near the substrate1 and the subpixel electrodes 4₁ and 4₂ are on the other side of thefirst insulating layer 15 opposite from the substrate 1, their positionsmay also be exchanged as shown in section in FIG. 8 corresponding toFIG. 5. That is, in the FIG. 8 embodiment the electrodes 2, 4₁ and 4₂are identical in shape with those in FIG. 4 embodiment, but the subpixelelectrodes 4₁ and 4₂ are deposited on the inside of the substrate 1 andthe source and drain electrodes 8S and 8D of the thin film transistor 8are also formed on the same interior surface of the substrate 1 as thesubpixel electrodes 4₁ and 4₂ are provided, the drain electrode 8D beingconnected directly to the subpixel electrode 4₁. The first insulatinglayer 15 serves also as the gate insulating film of the thin filmtransistor 8. On the top of the first insulating layer 15 there aredeposited the control capacitor electrode 2, the gate electrode 8G ofthe thin film transistor 8 and the additional capacitor electrode 12. Inthis embodiment the entire region of the control capacitor electrode 2functions as one subpixel electrode, but as in the embodiment of FIGS. 4and 5, the control capacitor electrode 2 connects the subpixelelectrodes 4₁ and 4₂ in series to each other via the control capacitorsC_(C1) and C_(C2). Hence, the equivalent circuit of the pixel is thesame as shown in FIG. 6 and the same results as those obtainable withthe embodiment of FIGS. 4 and 5 can be obtained.

Although the foregoing embodiment have each been described to asemploying what is called a gate top type thin film transistor, it isevident that a so-called gate bottom type thin film transistor may alsobe used. FIG. 9 shows, in section, an example in which the gate bottomtype thin film transistor is used in the structure of the FIG. 8embodiment, the parts corresponding to those in FIG. 8 being identifiedby the same reference numerals and characters. As depicted in FIG. 9,the gate electrode 8D of the thin film transistor 8 is formed betweenthe substrate and the insulating layer 15 in the same manner as thesubpixel electrodes 4₁ and 4₂, and the semiconductor layer 8SC is formedon the insulating layer 15 in opposing relation to the gate electrode8G, the insulating layer 15 serving also as a gate insulating film.Further, the source electrode 8S and the drain electrode 8D are formedpartly overlapping opposite marginal portions of the semiconductor layer8SC, and the drain electrode 8D is connected to the subpixel electrode4₁ through the contact hole 15H made in the insulating layer 15. Thedisplay panel of this example is identical in construction with the FIG.8 embodiment except for the above. The control capacitor electrode 2 isformed on the insulating layer 15 so that it covers the entire area ofthe gap GP and overlaps the subpixels 4₁ and 4₂ over predeterminedareas. Thus, the equivalent circuit of the pixel in this example is thesame as shown in FIG. 6, as is the case with the FIG. 8 embodiment, andit is evident that the construction of this example brings about thesame effect obtainable with the embodiment depicted in FIGS. 4 and 5. Itis also possible, in this embodiment, to form the control capacitorelectrode 2 between the insulating layer 15 and the substrate 1 andprovide the subpixel electrodes 4₁ and 4₂ on the insulating layer 15, asin the case of FIG. 5 embodiment. In such a case, the contact hole 15Hneed not be made in the insulating layer 15 and the drain electrode 8Dcan be connected directly to the subpixel electrode 4₁, andconsequently, the number of manufacturing steps of the display paneldecreases accordingly.

Although the present invention has been described above as being appliedto a pixel structure which can be driven at three levels one afteranother through use of the two subpixel electrodes 4₁ and 4₂ and the onecontrol capacitor electrode 2, it is also possible to increase thenumber of pixel driving levels by using more control capacitorelectrodes and subpixel electrodes on the basis of the principle of thepresent invention. FIGS. 10 and 11, corresponding to FIGS. 4 and 5,illustrate another embodiment which employs two control capacitorelectrodes and three subpixel electrodes in the pixel structure shown inFIGS. 4 and 5, and FIG. 12 shows its equivalent circuit. In thisembodiment subpixel electrodes 4₁, 4₂ and 4₃ are separated by gapregions GP₁ and GP₂, respectively, and control capacitor electrodes 2₁and 2₂ are provided which cover the gap regions GP₁ and GP₂ and overlapadjacent subpixel electrodes over desired areas across the firstinsulating layer 15. With this structure, the subpixel electrodes 4₁, 4₂and 4₃ are capacitively coupled in parallel via control capacitorsC_(C1), C_(C2), C_(C3) and C_(C4) one after another, forming liquidcrystal capacitors C_(LC1), C_(LC3) and C_(LC5) between them, and thecommon electrode 6 opposite thereto, respectively. The control capacitorelectrodes 2₁ and 2₂ also form liquid crystal capacitors C_(LC2) andC_(LC4) between them and the common electrode 6 in the gap regions GP₁and GP₂, respectively. As can be seen from the equivalent circuitdepicted in FIG. 12, the drive voltage Va, which is applied via the thinfilm transistor 8, is provided directly to the liquid crystal capacitorC_(LC1) and sequentially lower voltages, which are provided by thecapacitance division of the drive voltage Va, are applied to the liquidcrystal capacitors C_(LC2) through C_(LC5), respectively. This permitsdriving of the pixel region at five levels. It can readily be understoodthat the capacitance-divided voltages, which are applied to the liquidcrystal capacitors C_(LC2) through C_(LC5), can be chosen as desired bya suitable selection of the areas of the subpixel electrodes overlappingthe control capacitors 2₁ and 2₂.

While in the above the present invention has been described as beingapplied to the light transmitting type liquid crystal display panel, itwill be seen that the invention is also applicable to a light reflectingtype liquid crystal panel wherein each control capacitor electrode andeach subpixel electrode are formed by metal layers.

As is evident from the above, according to the present invention, aplurality of subpixel electrodes, separated by a gap region, areprovided on one side of an insulating layer and at least one controlcapacitor electrode is provided on the other side of the insulatinglayer in such a manner that it covers the gap region and overlaps theadjacent but spaced subpixel electrodes over predetermined areasthereof. Moreover, the entire pixel region is covered with the subpixelelectrodes and the control capacitor electrode. Thus, the entire pixelregion functions as a display-enable region, and hence this pixelstructure has a high aperture ratio.

As can be seen from comparison of the structures shown, for example, inFIGS. 5 and 8, there is no substantial distinction between the subpixelelectrodes and the control capacitor electrodes in the presentinvention. The most striking feature of the present invention resides inthe construction wherein a plurality of series-connected controlcapacitors are provided and a liquid crystal capacitor is connected toone end of each control capacitor, as depicted in the equivalent circuitof FIG. 6 or 12. This construction differs entirely from theconstruction set forth in our aforementioned prior U.S. patent which isrepresented by an equivalent circuit wherein a plurality ofseries-connected pairs of control capacitors and liquid crystalcapacitors are connected in parallel.

Having thus described our invention.

We claim:
 1. A gray-scale liquid crystal display panel comprising firstand second transparent substrates disposed in parallel with liquidcrystal interposed therebetween, said first substrate having an interiorsurface on which a plurality of pixels are arranged in a matrix form, aplurality of thin film transistors connected to said pixels,respectively, source lines connected to sources of said thin filmtransistors of each column of said matrix to apply thereto a drivevoltage and gate lines connected to gates of said thin film transistorsof each row of said matrix to apply thereto a gate signal for ON-OFFcontrol thereof, said second substrate being coated all over itsinterior surface with a transparent common electrode opposite all ofsaid pixels, each of said pixels comprising:a transparent insulatinglayer formed on said first substrate; at least first and second subpixelelectrodes formed on one side of said insulating layer, said first andsecond subpixel electrodes being separated by a gap; a drain electrodeof the thin film transistor corresponding to said each pixel beingformed on said insulating layer at the side opposite from said first andsecond subpixel electrodes and electrically connected directly to saidfirst subpixel electrode through a contact hole made in said insulatinglayer; and at least one control capacitor electrode formed on the otherside of said insulating layer, covering substantially the entire area ofsaid gap and overlapping said first and second subpixel electrodesacross said insulating layer over predetermined areas thereof to formfirst and second control capacitors, one side of said first controlcapacitor being connected to said drain electrode, the other side ofsaid first control capacitor being connected to one side of said secondcapacitor, and the other side of said second control capacitor beingconnected to said second subpixel electrode.
 2. A gray-scale liquidcrystal display panel comprising first and second transparent substratesdisposed in parallel with liquid crystal interposed therebetween, saidfirst substrate having an interior surface on which a plurality ofpixels are arranged in a matrix form, a plurality of thin filmtransistors connected to said pixels, respectively, source linesconnected to sources of said thin film transistors of each column ofsaid matrix to apply thereto a drive voltage and gate lines connected togates of said thin film transistors of each row of said matrix to applythereto a gate signal for ON-OFF control thereof, said second substratebeing coated all over its interior surface with a transparent commonelectrode opposite all of said pixels, each of said pixels comprising:atransparent insulating layer formed on said first substrate; at leastfirst and second subpixel electrodes formed on the side of saidinsulating layer near said first substrate, said first and secondsubpixel electrodes being separated by a gap; a drain electrode of thethin film transistor corresponding to said each pixel being electricallyconnected directly to said first subpixel electrode; and at least onecontrol capacitor electrode formed on the other side of said insulatinglayer, covering substantially the entire area of said gap andoverlapping said first and second subpixel electrodes across saidinsulating layer over predetermined areas thereof to form first andsecond control capacitors, one side of said first control capacitorbeing connected to said drain electrode, the other side of said firstcontrol capacitor being connected to one side of said second controlcapacitor, and the other side of said second control capacitor beingconnected to said second subpixel electrode.